IC Design Projects: 65 nm Decoder
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Layout of a "32-Word Row Decoder with Predecoder" in TSMC 65 nm Technology.
This layout uses a hierarchical design, and contains the following blocks:
INV (p480n240), INV (p72n36), NAND2 (p192n192, p32n32) NAND3 (p40n60)
Phillip V. Do